The Cavium OCTEON is a multicore SoC platform marketed primarily towards makers of network infrastructure equipment which is supported by FreeBSD/mips. It comes in configurations of 1 to 32 cores at clock rates ranging from 300MHz to 1.5GHz. The greatest number of cores and the highest clock rates are based on a recent revision to the architecture called OCTEON II which is not as readily-available as the previous incarnation, Octeon Plus. Octeon Plus boards running between 500MHz and 750MHz are readily available on eBay and direct from manufacturers with between 2 and 16 cores in PCI-X and standalone form factors.

Cavium requires an NDA for access to documentation but also runs a cnUsers program through which anyone may get access to their periodic releases of an open source version of their SDK. This is like the usual Octeon SDK but does not include advanced APIs for cryptography and compression, providing only primitive or limited interfaces, though these can generally be used to effect more advanced functionality with little effort.

FreeBSD can be booted on Octeon from disk or network using an ELF kernel through U-Boot with the "bootoctlinux" command. Support for some on-chip facilities is limited to those for which the kernel has some use and support for peripheral buses is yet nascent, although PCI, PCI-X and PCIe support is fairly complete. (There may be DMA issues with some devices.) There are not, for example, drivers that provide some interface to the on-chip DFA engine.

The Ethernet driver does not support some newer hardware, as Octeon II hardware has not been obtainable by those working actively on FreeBSD support for Octeon.

Specific commercially-available boards tested and working with -CURRENT:

FreeBSD/mips/Octeon (last edited 2012-04-18 17:50:23 by JuliMallett)