This page describes what is required to get ARM to Tier 1.
this page is in need of an update as of 20190714.
Question: Is 32-bit the target, or both 32-bit and 64-bit?
Answer: Both. Input from this thread states TARGET=arm TARGET_ARCH=armv6.
NB: as of FreeBSD 12 the 32-bit emphasis will prbably shift from armv6 to armv7, leaving armv6 mostly of interest to owners of older-generation Raspberry Pis. The 64-bit target will remain aarch64 (aka arm64).
Source
Change |
Person |
Status |
Add support for the hard-float ABI |
||
Fix jemalloc crashes |
db@, others? |
|
Fix SMP |
cognet@, ian@ |
|
Fix the endian issue |
ian@, AndrewTurner |
Fixed (r261393) |
GENERIC Kernel |
Done |
|
ZFS |
None |
Needs an owner |
C++ Exceptions don't work w/EABI |
ian@ |
Fixed for gcc, cannot fix for clang until 3.5 import |
TODO: Add other source changes
GENERIC kernel
AndrewTurner's plan is to create a per-SoC family kernel that can boot on all boards with one of these SoCs, e.g. all armv6 i.Mx, or Ti SoCs. For this we need (at least):
- Pinmix framework
- arm_intrng
- Multiple implementations of DELAY
Ports
Change |
Person |
Status |
Official packages |
portmgr |
Official packages building and publishing on official repositories. Schedule not automated yet due to performance and churn of stability. Lack of testing support for ports committers is an open problem for tier1. |
Right now, only armv6 and aarch64 are available: see here for the current list.
TODO: Add ports changes
Documentation
Change |
Person |
Status |
Handbook chapters on building and configuring ARM systems |
None |
Needs an owner |
TODO: Add other documentation requirements.
Release Engineering
Change |
Person |
Status |
Decide the format of armv6 releases |
Glen Barber |
Initial structure added (r262810) |
Document re@ requirements |
Glen Barber |
Not yet started |
Finalize list of platforms to provide images for |
ARM Cabal |
There is no ARM Cabal |
FreeBSD Update for ARM integration |
Colin Percival |
Waiting for release format |
Security Officer
TODO: Add so@ requirements