This page describes the state of the kernel's various pmap implementations.
Must not preset the accessed bit.
Contrary to comments in powerpc/powerpc/mmu_if.h, pmap_mincore() is not optional. It is not an "optimization" in the same sense that pmap_copy() is. Not implementing pmap_mincore() doesn't just affect mincore(2)'s execution time, it also affects the returned information. Specifically, without a correct and complete pmap_mincore() implementation, mincore(2) will never return MINCORE_MODIFIED and/or MINCORE_REFERENCED, but only MINCORE_MODIFIED_OTHER and/or MINCORE_REFERENCED_OTHER.
As an aside, MINCORE_MODIFIED_OTHER and MINCORE_REFERENCED_OTHER were arguably misnamed. MINCORE_MODIFIED_ANY and MINCORE_REFERENCED_ANY would have been more logical names given their meanings.
Currently, the following architectures are missing a pmap_mincore() implementation: arm, powerpc/booke, powerpc/aim (32- and 64-bit), sparc64, and sun4v.
Unfortunately, due to the lack of per-PTE reference information, it is impossible to determine if the address is MINCORE_REFERENCED.
Arm and PowerPC appear to have bogus pmap_page_is_mapped() implementations. They count non-managed mappings.
Only pmap_enter() should add access rights to a mapping.
An implementation must clear any PTE modified bits and set the page's dirty field.
An implementation must call vm_page_dirty() before clearing PG_WRITEABLE. Moreover, it must take any necessary steps to ensure that the effects of vm_page_dirty() are visible.
pmap_enter_pv() shouldn't set PG_REFERENCED.
Lack of a PTE reference bit makes a complete implementation of pmap_ts_referenced() impossible.
Why is MIPS using atomics for PTE changes? The software-managed TLB doesn't write back modified bits, etc.
pmap_change_wiring() doesn't change the pv entry flag, so pmap_page_wired_mappings() may return the wrong value.
pmap_remove_pages() needn't use sched_pin().
The pmap_enter() implementation could lose a modified bit.
Can the pmap_enter() implementation lose a modified bit? Or is there TSB synchronization that prevents concurrent setting of the modified bit?