Port amd64 SIMD libc optimizations to riscv64

Project description

The goal of the project is to port the SIMD optimized routines written for amd64 to riscv64. This will be accomplished using SWAR techniques. Because the code will only depend on the base integer ISA, the optimizations will result in a performance increase on all riscv64 systems.

Deliverables

Implemented functions:

By finishing these functions, the following functions also received performance improvements:

Also as part of the project two unit tests were improved:

The following functions remain to be implemented:

After all of the functions are implemented, and after an exp-run, the functions will be merged into -CURRENT.

A repository containing performance improvement results can be found here.

Milestones

Test Plan

Code will be tested using the available FreeBSD tests on a RISC-V development board (HF105-000). Additional tests will be written if needed. Performance will be measured using strperf (https://github.com/clausecker/strperf).

The Code

https://github.com/strajabot/freebsd-src

Notes

I will posting updates on my blog while I work on the project (https://strajabot.com)

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SummerOfCode2024Projects/PortAmd64SIMDLibcOptimizationsToRiscv64 (last edited 2024-10-25T10:19:09+0000 by StrahinjaStanisic)