#language en
#pragma description rtwn(4) chipset documentation
#pragma keywords rtwn(4), realtek, RTL8188, RTL8192, RTL8812, RTL8821
#pragma section-numbers 2#
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<<TableOfContents()>>


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= Realtek Chipset Documentation =

This is a placeholder for publicly available and reverse engineered chipset documentation.

(this is an experiment)

== Registers ==

=== 0x0440 - RRSR ===

|| 0x0440 || RRSR || || || Response Rate control bitmap, HT40 channel (RTL8188E, RTL8192C only) || RTL8188E, RTL8192E, RTL8192C ||
|| || || 0..19 || RATE_BITMAP || Rate bitmap used for self-generated frames (RTS/CTS/BA/ACK) || RTL8188E, RTL8192E, RTL8192C ||
|| || || 21 || RSC_LOWSUBCHNL || 1 = HT40 for the primary channel being below the channel centre || RTL8188E ||
|| || || 21 || RSC_LOWSUBCHNL || 1 = HT40 for the secondary channel being below the channel centre || RTL8192C ||
|| || || 22 || RSC_UPSUBCHNL || 1 = HT40 for the primary channel being above the channel centre || RTL8188E ||
|| || || 22 || RSC_UPSUBCHNL || 1 = HT40 for the secondary channel being above the channel centre || RTL8192C ||
|| || || 23 || SHORT || 1 = use short preamble for CCK || RTL8188E, RTL8192E, RTL8192C ||

The RRSR register is used for configuring RTS frame and self-generated response rate control. The rate bitmap matches the normal rate indexes documented elsewhere.

Notably, this is used for ACK/Block-ACK generation and CTS responses.  For correct CTS operation in 11G / 11BG mixed mode, ensure that a CCK rate is available. For correct ACK/Block-ACK responses, ensure that an OFDM rate is available. If an OFDM rate is not available, ACK/Block-ACK responses to MCS frames will be at MCS7, which is extremely sub-optimal.

Also keep in mind that using higher CCK/OFDM/MCS rates in this bitmap will cause performance issues as those higher bitrates will not be robust in a noisy or normal signal environment. Please ensure the higher bitrates are masked out. The vendor and linux drivers only allow CCK1/CCK2 (for 2GHz), OFDM6/9/12 and MCS0 as basic rates.

Note that the initial RTS rate is configured elsewhere - in the TX descriptors if configured, and the INIRTS_RATE_SEL register (0x0480).

The UP/LOW sub channel register bits control whether to generate RTS/CTS exchanges on the primary, or primary + secondary channels when in 40MHz 11n operation.


=== 0x0458 - AGGLEN_LMT (RTL8188E, RTL8192C) ===


|| 0x0458 || AGGLEN_LMT || || || Maximum number of MPDUs in a transmitted A-MPDU || RTL8188E, RTL8192C ||
|| || || 0..3 || AGGLMT_MCS0 || Maximum number of MPDUs in an A-MPDU for MCS0 || RTL8188E, RTL8192C ||
|| || || 4..7 || AGGLMT_MCS1 || Maximum number of MPDUs in an A-MPDU for MCS1 || RTL8188E, RTL8192C ||
|| || || 8..11 || AGGLMT_MCS2 || Maximum number of MPDUs in an A-MPDU for MCS2 || RTL8188E, RTL8192C ||
|| || || 12..15 || AGGLMT_MCS3 || Maximum number of MPDUs in an A-MPDU for MCS3 || RTL8188E, RTL8192C ||
|| || || 16..19 || AGGLMT_MCS4 || Maximum number of MPDUs in an A-MPDU for MCS4 || RTL8188E, RTL8192C ||
|| || || 20..23 || AGGLMT_MCS5 || Maximum number of MPDUs in an A-MPDU for MCS5 || RTL8188E, RTL8192C ||
|| || || 24..27 || AGGLMT_MCS6 || Maximum number of MPDUs in an A-MPDU for MCS6 || RTL8188E, RTL8192C ||
|| || || 28..31 || AGGLMT_MCS7 || Maximum number of MPDUs in an A-MPDU for MCS7 || RTL8188E, RTL8192C ||

This controls how many individual MPDUs to a single destination are combined into a single A-MPDU for transmission.

This allows the driver to artificially limit how long an A-MPDU may be - for example, limiting MCS0 to 1 or 2 MPDUs, whilst allowing an MCS7 MPDU to have up to 15 subframes.

Note that this applies to each spatial stream multiple of an MCS rate - MCS0 also applies to MCS8, MCS16, MCS24, MCS1 also applies to MCS9, MCS17, MCS25, etc.

=== 0x0458 - AGGLEN_LMT (RTL8192E, RTL8812A, RTL8821A, RTL8814A) ===

|| 0x0458 || AGGLEN_LMT || || || Maximum size in bytes of a transmitted A-MPDU || RTL8192E, RTL8812A, RTL8821A, RTL8814A ||
|| || || 0..16 || AGGLMT || Maximum size of an A-MPDU in HT / VHT mode || RTL8192E, RTL8812A, RTL8821A, RTL8814A ||
|| || || 31 || Unknown || Configured in the vendor driver as '1' || RTL8192E, RTL8812A, RTL8821A (NOT RTL8814A) ||

This changed in the 11ac chipsets to become a maximum byte size instead of a maximum frame count.
The vendor driver caps the value at 0xffff (64k - 1) for RTL8192E and RTL8821A, 0x1ffff (128k - 1) for RTL8812A, and 0x3ffff (256k - 1) for RTL8814A.

=== 0x0608 - RCR (all) (32 bit) ===

Note: taken from lwfinger/rtl8812au - needs to be validated for other chipsets!

|| 0x0608 || RCR || || || Receive Filter || (all) ||
|| || || 0 || RCR_AAP || Accept all unicast packet || ||
|| || || 1 || RCR_APM || Accept all physical match packet (?) || ||
|| || || 2 || RCR_AM || Accept multicast packet || ||
|| || || 3 || RCR_AB || Accept broadcast || ||
|| || || 4 || RCR_ADD3 || Accept 3 address match packet (?) || ||
|| || || 5 || RCR_APWRMGT || Accept Power Management Packet (?) || ||
|| || || 6 || RCR_CBSSID_DATA || Accept BSSID match (data) || ||
|| || || 7 || RCR_CBSSID_BCN || Accept BSSID match (beacon) || ||
|| || || 8 || RCR_ACRC32 || Accept CRC32 error packets || ||
|| || || 9 || RCR_ICV || Accept ICV error packets || ||
|| || || 10 || (reserved) || || ||
|| || || 11 || RCR_ADF || Accept data type frame (This bit also regulates BA, BAR, and PS-Poll (AP mode only) || ||
|| || || 12 || RCR_ACF || Accept control type frame (Control frames BA, BAR, and PS-Poll (when in AP mode) are not controlled by this bit. They are controlled by ADF. || ||
|| || || 13 || RCR_AMF || Accept management type frame || ||
|| || || 14 || RCR_HTC_LOC_CTRL || MFC<--HTC=1 MFC-->HTC=0 (?) || ||
|| || || 15 || (reserved) || || ||
|| || || 16 || RCR_UC_DATA_EN ||  Unicast data packet interrupt enable || ||
|| || || 17 || RCR_BM_DATA_EN || Broadcast data packet interrupt enable || ||
|| || || 18 || RCR_TIM_PARSER_EN || RX Beacon TIM Parser || ||
|| || || 19 || (reserved) || || ||
|| || || 20 || (reserved) || || ||
|| || || 21 || (reserved) || || ||
|| || || 22 || RCR_MFBEN ||  Enable immediate MCS Feedback function. When Rx packet with MRQ = 1'b1, then search KEYCAM to find sender's MCS Feedback function and send response. || ||
|| || || 23 || RCR_LSIGEN || Enable LSIG TXOP Protection function. Search KEYCAM for each rx packet to check if LSIGEN bit is set. || ||
|| || || 24 || RCR_ENMBID || Enable Multiple BssId. Only response ACK to the packets whose DID(A1) matching to the addresses in the MBSSID CAM Entries. || ||
|| || || 25 || (reserved) || || ||
|| || || 26 || RCR_NONQOS_VHT || (reserved) || || ||
|| || || 27 || RCR_APP_BA_SSN || SSN of previous TXBA is appended as after original RXDESC as the 4-th DW of RXDESC. || ||
|| || || 28 || RCR_APP_PHYST_RXFF || PHY Status is appended before RX packet in RXFF || ||
|| || || 29 || RCR_APP_ICV ||  MACRX will retain the ICV at the bottom of the packet. || ||
|| || || 30 || RCR_APP_MIC || MACRX will retain the MIC at the bottom of the packet. || ||
|| || || 31 || RCR_APPFCS || WMAC append FCS after payload. || ||

=== 0x06a0 - RXFLT0 (all) (16 bit) ===

Control which management frames are passed up to the RX path. This is a bitmap of 802.11 management frame subtypes from 0..15.

=== 0x06a2 - RXFLT1 (all) (16 bit) ===

Control which control frames are passed up to the RX path. This is a bitmap of 802.11 management frame subtypes from 0..15.

=== 0x06a4 - RXFLT2 (all) (16 bit) ===

Control which data frames are passed up to the RX path. This is a bitmap of 802.11 management frame subtypes from 0..15.

== TX Descriptors (RTL8192CU) ==

(TBD)

 * Setting the DRVRATE bit allows the DATARATE and RTSRATE fields to override the INIDATA / INIRTS registers to set the initial data and RTS/CTS rate.

== Firmware API (RTL8192CU) ==

(TBD)

== Firmware API (RTL8188EU) ==

(TBD)

== Firmware API (RTL8192EU) ==

(TBD)

=== Commands ===

(TBD)

=== Responses / Notifications ===

(TBD)

=== Rate Control ===

(TBD)

== Firmware API (RTL8812AU / RTL8821AU) ==

(TBD)



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