Marvell 88E6xxx ethernet switch driver
Contents
The e6000sw(4) driver handles a variety of Marvell 88E6xxx ethernet switches.
Hardware Support
- Marvell 88E6141
- Marvell 88E6341
- Marvell 88E6352
- Marvell 88E6172
- Marvell 88E6190
- Marvell 88E6190X
Feature Support
The driver supports per-port VLAN and dot1q VLAN configuration. Other features, such as IEEE1588, QoS / queue control, are currently not supported.
Hardware Overview
The Marvel 88E6xxx series of switches are an integrated 10/100/1000 ethernet switch which can be configured as either fully standalone, fully host controlled, or a combination of both. The switches typically contain 6 or more 10/100/1000 ports with integrated PHYs and one or more RGMII/SGMII ports to connect to external PHYs / a host CPU. They are configured using an external EEPROM which can be used to configure the initial switch configuration and PHY configuration, supporting fully standalone operation.
They communicate with the host using an MDIO interface using Clause 22. Clause 45 is not supported between the host and switch.
The specific mappings of CPU, switch ports and RGMII/SGMII ports is chipset specific.
Marvell 88E6141
Marvell 88E6341
Marvell 88E6352
Marvell 88E6172
Marvell 88E6190 / 88E6190X
- Port 0 - CPU port
- Port 1..8 - 10/100/1000 ports, with PHYs
- Port 9..10 - SGMII ports to CPU, external PHYs, etc
Initial Configuration
There are two ways to configure the e6000sw(4) driver:
- Via a flattened device tree configuration - fdt(4) - typically found on ARM, MIPS, PPC embedded platforms
- Via hints on a non-FDT configuration - typically found on x86 platforms.
FDT configuration
(TBD)
Hints configuration
There are a few parts to the hint configuration:
- Initial probe/attach requirements
- Per-port configuration
- CPU port configuration
hint.e6000sw.X.is6190=<1|0> hint.e6000sw.X.is6190x=<1|0>
These hints control whether the switch is a 88E6190 or 88E6190X. These two switch parts have slightly different register IO mappings and need a hint beforehand for probe/attach to complete.
hint.e6000sw.X.addr=<0..31>
This controls which MDIO bus PHY ID to use. Using addr=0 (PHY 0) means the etherswitch is the only device on the bus, and will use the whole PHY ID space. Using addr > 0 (PHY 1..31) configures the switch to use only that PHY ID, and is designed for the switch to co-exist with other PHYs on the same MDIO bus.
hint.e6000sw.X.portYdisabled=<1|0>
Disable the given port.
hint.e6000sw.X.portYcpu=<1|0>
This configures a port as a fixed CPU facing port. CPU ports have a fixed speed and no PHY attached.
hint.e6000sw.X.portYspeed=<100|1000|2500>
This configures the fixed port speed. Valid values are 10, 100, 1000 or 2500.
Example Configurations
(TBD)