StarFive RISC-V SoC Support
VisionFive v2 / JH7110
Currently, there is only partial support for this SoC in FreeBSD CURRENT. Some efforts are in progress.
Firmware
A u-boot port is available as sysutils/u-boot-starfive-visionfive2.
Support Status
Device/Feature |
Status |
Commits |
Notes |
UART |
Done |
|
|
clk/reset |
Done |
STG clock grouping not implemented; might be needed for future drivers |
|
MMC |
Done |
|
|
Ethernet |
In-progress |
|
|
GPIO |
In-progress |
|
|
USB |
Needs work |
|
|
VisionFive v1 / JH7100
The first iteration of the VisionFive SoC, also known as the JH7100. There was a limited run of boards produced for this model, and hardware quirks/errata made supporting it difficult. The I/O coherence problems are not present in v2.
Support for this hardware was experimental, and never upstreamed to FreeBSD.
Original Beagle-V
A prototype of the VisionFive SoC, this board was the result of a partnership between StarFive and the Beagle Foundation. It was intended for wider production, but the partnership was dissolved. It has no relation to later "Beagle-V" products, such as the Beagle-V Ahead, which were not produced by StarFive.
Support for this hardware in FreeBSD was never finished.